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PTFA241301F V1

PTFA241301F V1

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    Flatpack2

  • 描述:

    IC FET RF LDMOS 130W H-30260-2

  • 数据手册
  • 价格&库存
PTFA241301F V1 数据手册
PTFA241301E PTFA241301F Thermally-Enhanced High Power RF LDMOS FETs 130 W, 2420 – 2480 MHz Description The PTFA241301E and PTFA241301F are thermally-enhanced 130-watt, internally matched GOLDMOS ® FETs intended for ultralinear applications. They are characterized for CDMA, CDMA2000, Super3G (3GPP TSG RAN), and WiMAX operation from 2420 to 2480 MHz. Full gold metallization ensures excellent device lifetime and reliability. VDD = 28 V, IDQ = 1150 mA, ƒ = 2450 MHz ACP Up Drain Efficiency (%) 35 -45 -50 ACP Low 30 -55 25 -60 20 -65 Efficiency 15 -70 ALT Up -75 10 Adj. Ch. Power Ratio (dBc) -40 40 -80 5 36 38 40 42 44 46 PTFA241301F Package H-31260-2 Features Three-carrier CDMA2000 Performance 45 PTFA241301E Package H-30260-2 48 • Thermally-enhanced packaging, Pb-free and RoHS-compliant • Broadband internal matching • Typical CDMA2000 performance at 2450 MHz - Average output power = 25 W - Linear Gain = 14 dB - Efficiency = 25% • Typical CW performance, 2420 MHz, 28 V - Output power at P–1dB = 140 W - Efficiency = 50% • Integrated ESD protection: Human Body Model, Class 2 (minimum) • Excellent thermal stability, low HCI drift • Capable of handling 10:1 VSWR @ 28 V, 130 W (CW) output power Output Power, Avg. (dBm) RF Characteristics Three-carrier CDMA2000 Measurements (not subject to production test—verified by design/characterization in Infineon test fixture) VDD = 28 V, IDQ = 1150 mA, P OUT = 25 W average, ƒ = 2450 MHz Characteristic Symbol Min Typ Max Unit Gain Gps — 14 — dB Drain Efficiency ηD — 25 — % ACPR — –50 — dBc Adjacent Channel Power Ratio All published data at TCASE = 25°C unless otherwise indicated *See Infineon distributor for future availability. ESD: Electrostatic discharge sensitive device—observe handling precautions! Data Sheet 1 of 12 Rev. 05, 2007-05-11 PTFA241301E PTFA241301F RF Characteristics (cont.) Two-tone Measurements (tested in Infineon test fixture) VDD = 28 V, IDQ = 1150 mA, POUT = 130 W PEP, ƒ = 2420 MHz, tone spacing = 1 MHz Characteristic Symbol Min Typ Max Unit Gain Gps 13.0 14 — dB Drain Efficiency ηD 36 38 — % Intermodulation Distortion IMD — –30 –28 dBc DC Characteristics Characteristic Conditions Symbol Min Typ Max Unit Drain-Source Breakdown Voltage VGS = 0 V, IDS = 10 mA V(BR)DSS 65 — — V Drain Leakage Current VDS = 28 V, V GS = 0 V IDSS — — 1.0 µA VDS = 63 V, V GS = 0 V IDSS — — 10.0 µA RDS(on) — 0.07 — Ω On-State Resistance VGS = 10 V, V DS = 0.1 V Operating Gate Voltage VDS = 28 V, IDQ = 1150 mA VGS 2 2.4 3 V Gate Leakage Current VGS = 10 V, V DS = 0 V IGSS — — 1.0 µA Maximum Ratings Parameter Symbol Value Unit Drain-Source Voltage VDSS 65 V Gate-Source Voltage VGS –0.5 to +12 V Junction Temperature TJ 200 °C Total Device Dissipation PD 438 W 2.5 W/°C Above 25°C derate by Storage Temperature Range TSTG –40 to +150 °C Thermal Resistance (TCASE = 70°C, 130 W CW) RθJC 0.40 °C/W Ordering Information Type Package Outline Package Description Marking PTFA241301E H-30260-2 Thermally-enhanced slotted flange, single-ended PTFA241301E PTFA241301F H-31260-2 Thermally-enhanced earless flange, single-ended PTFA241301F *See Infineon distributor for future availability. Data Sheet 2 of 12 Rev. 05, 2007-05-11 PTFA241301E PTFA241301F Typical Performance (data taken in a production test fixture) Linear Broadband Performance Broadband CW Performance (at P–1dB) VDD = 28 V, IDQ = 1150 mA, POUT, Avg. = 45.5 dBm VDD = 28 V, IDQ = 1150 mA 18 53 -5 10 -10 Return Loss 5 -15 Gain (dB) Gain (dB) Gain Return Loss (dB) 17 15 Output Power 16 51 15 Efficiency 14 2430 2440 2450 2460 2470 -20 2480 2430 2440 2450 2460 2470 47 2480 Frequency (MHz) Frequency (MHz) Intermodulation Distortion vs. Output Power Gain & Efficiency vs. Output Power (as measured in a broadband circuit) VDD = 28 V, IDQ = 1150 mA, ƒ1 = 2449 MHz, ƒ2 = 2450 MHz VDD = 28 V, IDQ = 1150 mA, ƒ = 2450 MHz -10 -20 3rd Order -30 5th -40 7th 16 60 15 50 Gain 14 Gain (dB) IMD (dBc) 48 Gain 12 2420 0 -50 50 49 13 0 2420 52 40 13 30 12 20 Efficiency -60 11 -70 -80 10 10 36 38 40 42 44 46 48 50 52 Data Sheet 0 36 Output Power, Avg. (dBm) Efficiency (%), POUT (dBm) 0 Drain Efficiency (%) 20 38 40 42 44 46 48 50 52 Output Power (dBm) 3 of 12 Rev. 05, 2007-05-11 PTFA241301E PTFA241301F Typical Performance (cont.) Power Sweep Output Power (at 1 dB compression) vs. Supply Voltage VDD = 28 V, ƒ = 2450 MHz IDQ = 1150 mA, ƒ = 2450 MHz 52.0 15 IDQ = 1150 mA 51.5 Output Power (dBm) Power Gain (dB) IDQ = 1430 mA 14 13 IDQ = 860 mA 12 11 50.5 50.0 49.5 49.0 37 39 41 43 45 47 49 51 53 24 30 32 IS-95 CDMA Performance IM3 vs. Output Power at Selected Biases VDD = 28 V, IDQ = 1150 mA, ƒ = 2450 MHz VDD = 28 V, ƒ1 = 2449, ƒ 2 = 2450 MHz -20 -40 -50 25 -55 20 -60 15 -65 Efficiency 10 -70 5 -75 ACP FC + 1.98 MHz 0 -25 34 36 38 40 42 860 mA -35 -40 1430 mA -45 -50 -55 1150 mA -60 -65 -80 32 -30 IMD (dBc) ACP FC – 0.75 MHz Adjacent Channel Power Ratio (dBc) -45 30 36 44 Output Power, Avg. (dBm) Data Sheet 28 Supply Voltage (V) TCASE = 90°C 30 26 Output Power (dBm) TCASE = 25°C 35 Drain Efficiency (%) 51.0 38 40 42 44 46 48 50 Output Power, Avg. (dBm) 4 of 12 Rev. 05, 2007-05-11 PTFA241301E PTFA241301F Typical Performance (cont.) WiMAX Performance VDD = 28 V, IDQ = 1.2 A, (modulation = 64 QAM2/3, channel bandwidth = 3.5 MHz, sample rate = 4 MHz) 30 -15 Efficiency 25 -20 ƒ = 2.42 GHz ƒ = 2.48 GHz 20 -25 ƒ = 2.45 GHz VDD = 28 V, IDQ = 1.2 A, ƒ = 2480 MHz, (modulation = 64 QAM2/3, channel bandwidth = 3.5 MHz, sample rate = 4 MHz) -15 EVM (dB) -20 EVM (dBc) Efficiency (%) WiMAX Performance -25 t = +25 °C -30 15 -30 10 -35 5 -40 -40 -45 -45 0 15 20 25 30 35 40 45 t = –20 °C -35 50 t = +85 °C 15 20 Output Power (dBm) 25 30 35 40 45 50 Output Power (dBm) WiMAX Performance Power Sweep, under Pulsed Conditions VDD = 28 V, ƒ = 2480 MHz (modulation = 64 QAM2/3, channel bandwidth = 3.5 MHz, sample rate = 4 MHz) -15 VDD = 28 V, IDQ = 1.15 A, ƒ = 2420 MHz, pulse period = 800 µs, pulse width = 80 µs, 1% duty cycle 60 Output Power (dBm) EVM (dB) P–6dB = 52.5 dBm 58 -20 IDQ = 0.90 A -25 -30 -35 IDQ = 1.65 A -40 IDQ = 1.2 A P–3dB = 52.1 dBm 56 54 P–1dB = 51.5 dBm 52 Ideal 50 Actual 48 46 44 -45 15 20 25 30 35 40 45 30 50 Output Power (dBm) Data Sheet 35 40 45 Input Power (dBm) 5 of 12 Rev. 05, 2007-05-11 PTFA241301E PTFA241301F Typical Performance (cont.) CCDF vs. Output Power Peak-to-Average Ratio Bias Voltage vs. Temperature VDD = 28 V, IDQ = 1.15 A, ƒ = 2400 MHz, single-carrier 3GPP WCDMA, TM1, 64 DPCH, PAR = 7.5 dB Voltage normalized to typical gate voltage, series show current 100 Normalized Bias Voltage (V) Source Probability CCDF (%) 0.28 A 1.03 30 dBm 10 43 dBm 43.5 dBm 1 44 dbm 46 dBm 0.1 48 dBm 0.01 0.001 0 1 2 3 4 5 6 7 8 0.83 A 1.02 1.39 A 1.01 2.09 A 1.00 4.17 A 6.26 A 0.99 8.34 A 0.98 10.43 A 0.97 12.52 A 0.96 0.95 -20 9 0 20 40 60 80 100 Case Temperature (°C) Output Power PAR (dB) Broadband Circuit Impedance Z0 = 50 Ω D 0. 2 Z Source Z Load Z Load G 2480 MHz 0 .1 jX R jX 2420 13.20 4.69 1.35 4.73 2430 13.30 4.75 1.28 4.80 2450 13.85 4.94 1.14 4.99 2470 14.59 5.00 1.06 5.27 2480 15.01 4.91 1.01 5.43 0 .3 R 0 .1 MHz Z Source 2480 MHz 2420 MHz Z Load Ω 0 .0 Z Source Ω Frequency 2420 MHz 0 .2 S 0. 1 See next page for circuit information Data Sheet 6 of 12 Rev. 05, 2007-05-11 PTFA241301E PTFA241301F Reference Circuit C1 0.001µF R2 1.3K V R1 1.2K V QQ1 LM7805 VDD Q1 BCP56 C2 0.001µF C3 0.001µF R3 2K V R4 2K V R5 5.1K V C4 10 µF 35V R6 10V C5 0.1µF L1 R7 5.1K V C6 4.5pF C10 4.5pF l6 l1 l3 C8 0.9pF l4 l5 C13 10µF 50V V DD C18 4.5pF DUT l2 C12 0.1µF l9 C7 4.5pF R F_IN C11 1µF l7 l11 l8 C9 1.0pF l12 l13 l14 RF_OUT C19 0.6pF l10 L2 A241301e_sch C14 4.5pF C15 1µF C16 0.1µF C17 10µF 50V Reference circuit schematic for ƒ = 2420 MHz Circuit Assembly Information DUT PTFA241301E or PTFA241301F PCB 0.76 mm [.030”] thick, εr = 4.5 Microstrip l1 l2 l3 l4 l5 l6 l7 l8 l9, l10 l11 l12 (taper) l13 l14 LDMOS Transistor Rogers TMM4 Electrical Characteristics at 2420 MHz 1 Dimensions: L x W (mm) 0.112 λ, 50.0 Ω 7.52 x 1.37 0.039 λ, 34.0 Ω 2.54 x 2.54 0.045 λ, 34.0 Ω 2.92 x 2.54 0.044 λ, 34.0 Ω 2.87 x 2.54 0.017 λ, 34.0 Ω 1.09 x 2.54 0.307 λ, 60.0 Ω 21.01 x 0.97 0.019 λ, 14.7 Ω 1.17 x 7.62 0.083 λ, 8.0 Ω 5.03 x 15.24 0.237 λ, 50.0 Ω 16.00 x 1.27 0.057 λ, 4.3 Ω 3.43 x 29.85 0.098 λ, 4.3 Ω / 50.0 Ω 5.99 x 29.85 / 1.37 0.034 λ, 50.0 Ω 2.29 x 1.37 0.164 λ, 50.0 Ω 11.13 x 1.37 2 oz. copper Dimensions: L x W (in.) 0.296 x 0.054 0.100 x 0.100 0.115 x 0.100 0.113 x 0.100 0.043 x 0.100 0.827 x 0.038 0.046 x 0.300 0.198 x 0.600 0.630 x 0.050 0.135 x 1.175 0.236 x 1.175 / 0.054 0.090 x 0.054 0.438 x 0.054 1Electrical characteristics are rounded. Data Sheet 7 of 12 Rev. 05, 2007-05-11 PTFA241301E PTFA241301F Reference Circuit (cont.) R5 C5 R4 R3 C3 C1 C4 R2 R1 LM R7 C6 R6 VDD QQ1 C2 C10 C11 L1 Q1 C13 RF_IN VDD C12 RF_OUT C18 C7 C8 C9 C19 C16 VDD C17 L2 C14 C15 A241301e_assy-05-09-08 Reference circuit assembly diagram* (not to scale) Component Description Suggested Manufacturer P/N or Comment C1, C2, C3 C4 C5, C12, C16 C6, C7, C10, C14, C18 C8 C9 C11, C15 C13, C17 C19 L1, L2 Q1 QQ1 R1 R2 R3 R4 R5, R7 R6 Capacitor, 0.001 µF Tantalum capacitor, 10 µF, 35 V Capacitor, 0.1 µF Ceramic capacitor 4.5 pF Ceramic capacitor 0.9 pF Ceramic capacitor 1 pF Ceramic capacitor 1 µF Capacitor, 10 µF, 50 V Ceramic capacitor 0.6 pF Ferrite, 6 mm Transistor Voltage regulator, Chip resistor, 1.2 k-ohms Chip resistor, 1.3 k-ohms Chip resistor, 2 k-ohms Potentiometer, 2 k-ohms Chip resistor, 5.1 k-ohms Chip resistor, 10 ohms Digi-Key Digi-Key Digi-Key ATC ATC ATC Digi-Key Garrett Electronics ATC Ferroxcube Infineon Technologies National Semiconductor Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key PCC1772CT-ND 366-1655-2-ND PCC104BCT-ND 100B 4R5 100B 0R9 100B 1R0 19528-ND TPS106K050R0400 100B 0R6 53/3/4.6-452 BCP56 LM7805 P1.2KGCT-ND P1.3KGCT-ND P22KECT-ND 3224W-202ETR-ND P5.1KECT-ND P10ECT-ND *Gerber Files for this circuit available on request Data Sheet 8 of 12 Rev. 05, 2007-05-11 PTFA241301E PTFA241301F Package Outline Specifications Package H-30260-2 45° X (2.03 [.080]) 2X 12.70 [.500] 4X R 1.52 [.060] D (2X 4.83±0.50 [.190±.020]) S +0.10 LID 13.21 –0.15 [.520 +.004 –.006 ] 2X 3.25 [.128] FLANGE 13.72 [.540] 23.37±0.51 [.920±.020] 2X 1.63 [.064] R G SPH 1.57 [.062] 22.35±0.23 [.880±.009] 4.11±0.38 [.162±.015] 0.0381 [.0015] -A27.94 [1.100] 34.04 [1.340] 1.02 [.040] 260-cases_30260 Diagram Notes—unless otherwise specified: 1. Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001]. 2. All tolerances ± 0.127 [.005] unless specified otherwise. 3. Pins: D = drain, S = source, G = gate. 4. Interpret dimensions and tolerances per ASME Y14.5M-1994. 5. Primary dimensions are mm. Alternate dimensions are inches. 6. Gold plating thickness: S - flange: 2.54 micron [100 microinch] (min) D, G - leads: 1.14 micron ± 0.38 micron [45 microinch ± 15 microinch] Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/products Data Sheet 9 of 12 Rev. 05, 2007-05-11 PTFA241301E PTFA241301F Package Outline Specifications (cont.) Package H-31260-2 2X 12.70 [.500] 45° X 2.031 [.080] 2x 4.83±0.50 [.190±.020] D 13.72 [.540] LID 13.21 +0.10 –0.15 [.520 +.004 ] –.006 23.37±0.51 [.920±.020] . G 4X R 0.51 [R.020] MAX LID 22.35±0.23 [.880±.009] 4.11±0.38 [.162±.015] 0.0381 [.0015] -A1.02 [.040] SPH 1.57 [.062] FLANGE 23.11 [.910] S 260-cases_31260 Diagram Notes—unless otherwise specified: 1. Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001]. 2. All tolerances ± 0.127 [.005] unless specified otherwise. 3. Pins: D = drain, S = source, G = gate. 4. Interpret dimensions and tolerances per ASME Y14.5M-1994. 5. Primary dimensions are mm. Alternate dimensions are inches. 6. Gold plating thickness: S - flange: 2.54 micron [100 microinch] (min) D, G - leads: 1.14 micron ± 0.38 micron [45 microinch ± 15 microinch] Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/products Data Sheet 10 of 12 Rev. 05, 2007-05-11 PTFA241301EF Confidential, Limited Internal Distribution Revision History: 2007-05-11 Previous Version: 2006-06-29, Data Sheet Page Subjects (major changes since last revision) 5, 6 9 Data Sheet Add two graphs. Update package outline diagram for Package H-30260-2. Notes: Data Sheet 11 of 12 Rev. 05, 2007-05-11 PTFA241301E PTFA241301F We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: highpowerRF@infineon.com To request other information, contact us at: +1 877 465 3667 (1-877-GO-LDMOS) USA or +1 408 776 0600 International GOLDMOS ® is a registered trademark of Infineon Technologies AG. Edition 2007-05-11 Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2005. All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com/rfpower). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Data Sheet 12 of 12 Rev. 05, 2007-05-11
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